NAND: $\overline{A \cdot B}$ (NOT AND)

NOR: $\overline{A + B}$ (NOT OR)

XNOR: $\overline{A \oplus B}$ (NOT XOR)

Commutative: $A+B = B+A$, $A \cdot B = B \cdot A$
Associative: $(A+B)+C = A+(B+C)$, $(A \cdot B) \cdot C = A \cdot (B \cdot C)$
Distributive: $A \cdot (B+C) = A \cdot B + A \cdot C$, $A + (B \cdot C) = (A+B) \cdot (A+C)$
Identity: $A+0=A$, $A \cdot 1=A$
Null/Annihilation: $A+1=1$, $A \cdot 0=0$
Complement: $A+\bar{A}=1$, $A \cdot \bar{A}=0$
Idempotent: $A+A=A$, $A \cdot A=A$
Absorption: $A+(A \cdot B)=A$, $A \cdot (A+B)=A$
De Morgan's Laws: $\overline{A+B} = \bar{A} \cdot \bar{B}$, $\overline{A \cdot B} = \bar{A} + \bar{B}$

Truth Tables: Map all possible input combinations to outputs.
Karnaugh Maps (K-Maps): Graphical method to simplify Boolean expressions.
- Group adjacent 1s in powers of 2 (1, 2, 4, 8...).
- Groups can wrap around edges.
- Aim for largest possible groups to eliminate variables.
Combinational Circuits: Output depends only on current inputs (e.g., Half/Full Adders, Decoders, Multiplexers).
Sequential Circuits: Output depends on current inputs AND past inputs/state (e.g., Flip-Flops, Registers, Counters).

Arithmetic Logic Unit (ALU): Performs arithmetic and logical operations.
Control Unit (CU): Manages and coordinates all components. Fetches, decodes, executes instructions.
Registers: Small, fast storage within the CPU.
- Program Counter (PC): Stores address of next instruction.
- Memory Address Register (MAR): Stores address for read/write to memory.
- Memory Data Register (MDR): Stores data read from/written to memory.
- Instruction Register (IR): Stores the current instruction being executed.
- Accumulator (ACC): Stores results of ALU operations.
- General Purpose Registers: For temporary data storage.
Buses:
- Data Bus: Carries data between CPU and memory/I/O.
- Address Bus: Carries memory addresses from CPU to memory/I/O.
- Control Bus: Carries control signals (read/write, clock, interrupt).

Fetch: PC content loaded into MAR. Instruction at MAR address loaded into MDR, then into IR. PC incremented.
Decode: CU interprets the instruction in IR.
Execute: CU sends signals to other components to carry out the instruction. Data processed by ALU, results stored.