Cmos inverter — Free Electronics Illustration | GPAI

Electronics

Cmos inverter

Compact transistor-level schematic of a pseudo-NMOS inverter drawn in minimal black circuit-symbol style. A p-channel MOSFET load transistor is stacked above an n-channel MOSFET pull-down transistor in a vertical arrangement. The PMOS source connects to VDD, the NMOS source connects to ground, and their drains join at a single output node on the right. The PMOS gate is tied directly to ground so it is permanently on, while the input node on the left drives only the gate of the lower NMOS. Use standard MOSFET symbols with clear source, drain, and gate terminals; optional labels include QP for the PMOS, QN for the NMOS, vI for input, and vO for output.

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