001 010 100 110

XOR Gate (Exclusive OR): $Y = A \oplus B = \bar{A}B + A\bar{B}$

XNOR Gate (Exclusive NOR): $Y = \overline{A \oplus B} = AB + \bar{A}\bar{B}$

NOR gate based: Active LOW inputs.

S	R	Q$_{next}$	$\bar{Q}_{next}$	State
0	0	Q	$\bar{Q}$	No Change
0	1	0	1	Reset
1	0	1	0	Set
1	1	?	?	Forbidden (Invalid)

NAND gate based: Active HIGH inputs.

S	R	Q$_{next}$	$\bar{Q}_{next}$	State
0	0	?	?	Forbidden (Invalid)
0	1	1	0	Set
1	0	0	1	Reset
1	1	Q	$\bar{Q}$	No Change

Clocked S-R Flip-Flop: Has a clock input. State changes only on clock edge/level.
Race-around condition: In level-triggered S-R, if S=R=1 and clock is high, output oscillates.